RAM512 16bit

Activity 27:

RAM512 16bit. Just as easy as the last ram was. Its just a combination of the last set of ram chips.

PC the rest of the story

Activity 26:

Continued.

The order of things is when Mux are being used for if then else statements the last one goes first and the first one goes last.

So goes increment then load data the reset even though that seems backwards in coding since. It makes since in hardware because the last mux will change the output of all the rest.

That was the piece I was missing. It now works perfectly.

With that information I get

Increment then

Load then

reset    

with the register data having a feedback loop in it.

The Beginning of the PC(Program Counter)

Activity 26:

The book has the PC(program counter) as being the next activity so that is what I am going to do. With this one I have a data in and then load, inc, and reset. The inc is to change the output and the load and reset changes the input.

The thought proses.

1)if load is true then load data

2)if reset is true the rest the PC

It wont matter if load is true if rest is true because only one can excute and once because if you sent both their would have to be a rule on which one got excuted first and that may complicate things.

3)if inc is true then output gets +1;

I am using a register to hold the data the question is to tell it to rest or load new data.

I am going to work with just rest for now then move on to the next issue.

I have change it to work with load first because I think reset just works on the output.

The more I think about it the load just gets inputted into the register.   

Now I am going to work with just the output.

I have it set up the way I think it should be but it’s throwing an error saying that if all is 0 but for increment I should still get a 1 the second time around. I am not fallowing this logic.

So after reading the forums and reading my old HDL code I am still confused I think I will need to draw out the PC in actual schematic or pseudo code even though the book does say this

/**

 * A 16-bit counter with load and reset control bits.

 * if      (reset[t]==1) out[t+1] = 0

 * else if (load[t]==1)  out[t+1] = in[t]

 * else if (inc[t]==1)   out[t+1] = out[t] + 1  (integer addition)

 * else                  out[t+1] = out[t]

 */

I know what that means in c but I am not sure what that means in logic gates and hardware.

I belie MUX are just like if then statements but what direction should they flow because I am going to need more than one.

TO BE CONTINUED….. 

RAM64 is just one step in many.

Activity 25:

Create a Ram64 bit. After reading the section on it and double checking the inputs of the Ram8 with a little guessing I got it all to work out just fine. Trial and error sometimes works but is only worth trying if one is willing to go back and figure out why it work then it is all worth it.It builds on the last activity.